Several single-electron circuits have been recently proposed in the literature: single-electron memories [1], inverters and pumps [2], majority gates, logic gates [3], [4], half adders [5] and adders [6]. The need for computer-aided design and simulation of single-electron circuits has long been recognized [7]. Several simulators have been implemented to support single-electron circuit design. Nevertheless the development and fabrication of single electron devices has already taken place.
Single-electronics is one of the emerging nanoelectronic technologies that deal with the control of transport and position of a single or a small number of electrons. The fundamental physical principle of single-electronics is the tunnelling effect and the phenomenon of Coulomb blockade.

The Fredkin gate, known also as Fredkin-Toffoli gate, has been proposed by Fredkin and Toffoli in 1982 and performs conditional crossover of two data bits according to the values of a control bit. The Fredkin gate is a computationally universal gate, i.e. any Boolean function can be implemented using only by Fredkin gates.
A Single-electron Fredkin gate (SEF-gate) would be very useful, because digital single-electron circuits that use only one type of gate would be very much easier to fabricate than single-electron circuits that use various types of gates.
The most difficult hurdle for constructing single-electron memory arrays is the selective read and write operations. One of the aims of this work is to tackle this problem.
The basic Fredkin gate is a controlled swap gate that maps three inputs (C, I1, I2) onto three outputs (C, O1, O2). The C input is mapped directly to the C output. If C = 0, no swap is performed; I1 maps to O1, and I2 maps to O2. Otherwise, the two outputs are swapped so that I1 maps to O2, and I2 maps to O1. It is easy to see that this circuit is reversible, i.e., "undoes itself" when run backwards. A generalized n×n Fredkin gate passes its first n-2 inputs unchanged to the corresponding outputs, and swaps its last two outputs if and only if the first n-2 inputs are all 1.
The Fredkin gate is the reversible three-bit gate that swaps the last two bits if the first bit is 1. The logic operation of the SEF-gate is shown in Figure 6. Figures 6(a), 6(b) and 6(c) show the time variation of the input voltages V1, V2 and V3, respectively. The inputs are piece-wise constant and apply all possible combinations of logic “0” and “1” to the circuit. Figures 6(d) 6(e) and 6(f) show the time variation of the charge qa, qb and qc at the output islands Na, Nb and Nc respectively. The results from the graphs of Figure 6, compose the truth table of the SEF-gate. The output transition from logic “0” to logic “1” and vice versa does not drive the circuit to instability. The presence of charge on the output islands can be detected and transferred to circuits connected to the SEF-gate output using a sense amplifier.

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