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Optoelectronic-VLSI: photonics integrated with VLSI circuits

Optoelectronic-VLSI (OE-VLSI) technology represents the intimate integration of photonic devices with silicon
VLSI electronics. We review the motivations and status of emerging OE-VLSI technologies and examine the performance of OEVLSI technology versus conventional wire-bonded OE packaging.The results suggest that OE-VLSI integration offers substantial power and speed improvements even when relatively small numbers of photonic devices are driven with commodity complementary metal–oxide–semiconductor logic technologies. Index Terms— Circuit modeling, CMOS integrated circuits, flip-chip devices, integrated optoelectronics, laser arrays, optical arrays, optical interconnections, quantum-well devices, VCSEL’s

 

I. INTRODUCTION
OPTOELECTRONIC-VLSI (OE-VLSI) technology provides close integration of photonic devices with VLSI electronics. The goal is to supply multiple high-performance  optical inputs and output signals, with aggregate data-rates up to and even exceeding a terabit-per-second, to state-of-the-art VLSI circuits. OE-VLSI technologies are used most effectively in systems where a high-bandwidth “data-firehose” must be received, switched or quickly processed by the electronic
circuit, and communicated out of the subsystem [1]. Such a technology allows a significant increase in integration density over all-electrical systems because the functionality present inmany separate electronic chips can be condensed into fewer chips (and in some cases one single chip) with large numbers of optical inputs and/or outputs (I/O’s). The use of OE-VLSI “packaging” simultaneously affords a reduction in the energy required to transmit digital signals within the system (and hence the power-delay product of the system) by reducing (and in certain cases eliminating) the parasitics associated with conventional packaging technology that use wire-bonds between chips. This permits an increase in interconnect speed for a given power dissipation (or likewise, a reduction in power for a given system clock rate). In Section II, we will review emerging OE-VLSI technologies, and in the subsequent sections we will quantify the benefits of intimately integrating the photonic devices to the VLSI circuits by comparing an OEVLSI technology to a more conventional packaging approach here the photonic devices are wire-bonded to the electronics.
Manuscript received May 18, 1998. The authors are with Bell Labs, Lucent Technologies, Holmdel, NJ 07733 USA. Publisher Item Identifier S 1077-260X(98)09135-7. II. SMART PIXEL AND OE-VLSI TECHNOLOGIES “Smart-pixel” technologies can employ materials with  widely differing properties for light detection, logic, and optical transmission. Various smart pixel technologies are currently being developed. Most smart pixels are based on either silicon or gallium arsenide substrates. The main logic families being considered are silicon CMOS, silicon bipolar, and GaAs MESFET’s. As silicon–germanium technology  matures, this will also become a prime candidate for integration with photonic devices. Various light detectors, transceiver circuits, and light transmitter device technologies have also been proposed. OE-VLSI represents a generalization of smart-pixel technologies, in that the concept of each optical I/O channel being associated with only a specific subset of transistors on the chip (i.e., a pixel) [2], [3] is replaced with a more comprehensive view of a technology that provides surface-normal optical interconnects to VLSI circuits through either monolithic or hybrid integration methods. Compared to high-performance all-electronic systems, OEVLSI circuit technologies can offer a relatively simple means of communicating large amounts of information to-and-from a custom VLSI circuit, as well as a relative ease-of-design of the array. Indeed, one can show that a specific OE-VLSI technology can be expected provide an I/O bandwidth to a chip that grows in proportion to its computational bandwidth, even for ultradense CMOS VLSI [4]. Such technologies have spawned a number of applications in high-performance computing and communications systems [5]. One factor in determining the suitability of a smart-pixel or OE-VLSI technology to a given application is the light transmitter technology that is adopted. Three approaches are presently under investigation: laser sources, LED sources, and light modulators. The first approach has the advantage in that active light sources such as vertical-cavity surface-emitting lasers (VCSEL’s) can provide large dynamic range and high contrast ratios [6].1 The optical system can also be simplified because no external laser is required. Surface emitting lasers can be designed (with additional beam-shaping elements when necessary) to efficiently direct the laser beam out of the smart pixel. When arrays of lasers are integrated on a chip, substantial on-chip static power dissipation can ensue when
the lasers are biased above threshold. Although some ultralow threshold devices are now being researched, VCSEL’s
currently require threshold currents on the order of 100 A to 1 mA and threshold voltages of 1.5–2 V. When operating at
high-speeds (or with a large fan-out) this bias-power becomes only a fraction of the total operating power [7], [8] due to the dynamic power dissipation of the VCSEL and its associated driver. In these instances, the slope-efficiency of the VCSEL becomes the principal concern. Light-emitting diodes (LED’s) can presently be integrated on a large scale with GaAs logic and also with silicon  They benefit from simpler fabrication and larger tolerance to processing variations, but suffer from higher on-chip power dissipation and smaller modulation bandwidth. The large spectral width of their emission and their large emission angles are also potential issues. The light-modulator approach has the advantage that modulator fabrication processes can be extremely simple and may be more consistent with logic technology. They are capable of being produced in large arrays with high-yields. There exists a variety of materials capable of light modulation.
Light modulators are high-impedance, capacitive devices  (much like a CMOS gate) and hence can reduce the onchip
dissipated power. The excess heat dissipation due to the inefficiency associated with electrical-to-optical conversion in
the lasers is kept away from the electronic chip (although an external light-source is then required). For high-speed
digital interconnections, among the most promising and wellunderstood modulator candidates is the multiple-quantumwell (MQW) electroabsorption (EA) modulator. This is a low-capacitance device that can be switched at gigabits-persecond data rates by standard CMOS circuits [9]. The small switching energy of an MQW is achieved at the expense of a narrow, temperature-dependent spectral bandwidth. Nevertheless, modulator-based OE-VLSI technology has been proven
in several system demonstrations, and successful deliveries
of the technology have been made to numerous systems
groups around the world via multiproject foundry-shuttles
[10] (see Figs. 1 and 2). The incorporation of polarizationselective
holographic components with the OE-VLSI circuits
can effectively reduce the optical system complexity associated
with providing an array of read-beams for the modulator
devices [11].
Another critical feature that distinguishes smart-pixel or OEVLSI
technologies is the choice of integration method used
to create the OE circuits. These approaches can be broadly
classified as hybrid and monolithic. Monolithic integration
may ultimately ensure the manufacturability of large arrays
of optical devices on VLSI electronics at lower cost than the
hybrid approach. It is also expected that the parasitic capacitance
associated with monolithic devices will be low. Initial
experiments with modulator [12], LED [13], and VCSEL [14]
technologies have demonstrated that monolithic integration of
these optical devices onto GaAs circuits is possible. Effort
has also been invested in growing III–V materials directly
on silicon chips. However, a truly monolithic integration
technology for optical devices on prefabricated silicon CMOS
circuits has not yet emerged. Instead, a large amount of effort
has recently been focused on hybrid integration approaches.
One new class of hybrid techniques, known as wafer-fusion
[15]–[17], is applied at the wafer-level before the photonic
(a)
(b)
Fig. 1. (a) Structure of a 3-D hybrid GaAs MQW-modulator/silicon CMOS
circuit. (b) SEM photograph of the MQW diodes after bonding, substrate
removal, and epoxy removal.
devices are processed. This technique involves fusing two
wafers with different lattice constants under high-pressure
and elevated temperatures in contaminant-free environments.
This technique has been thus far used for fabrication of
long-wavelength VCSEL’s and photodetectors for telecommunications
applications, but also is promising for OE-to-VLSI
integration. Another prefabrication technique is polyimide
bonding [18], where multiple chip-scale III–V substrates can
be bonded, using a polyimide layer, to a processed silicon
wafer. Epitaxial device layers are grown on the III–V chips
before bonding, but processing of the photonic devices is
completed after the bonding to the silicon is performed.
VCSEL’s grown on silicon substrates have been demonstrated
using this hybrid integration method. Other hybrid techniques
such as fluidic self-assembly [19], [20] and DNA-assisted
self-assembly [21] are also emerging as wafer-scale hybrid
integration techniques for attaching fully-processed photonic
devices to VLSI circuits. The former has been used to integrate
LED’s and VCSEL’s to silicon circuits. Much research

remains, however, before these techniques can be routinely
used in a mainstream manufacturing environment.
Finally, we come to widely studied chip-scale techniques
for attaching processed photonic devices onto VLSI circuits.
These techniques include epitaxial liftoff [22], and flip-chip
bonding. The epitaxial-liftoff method involves the use of a
sacrificial layer under the epitaxial device layers, that can be
selectively etched to separate the epitaxial layers from the
substrate. A thin membrane is typically used to transfer the
devices to a host Silicon substrate. It has been used to attach
LED’s and photodetectors on Silicon circuits [23]–[25]. A
variant of this technique, known as appliqu´e [26], has recently
been used to bond a VCSEL, a device that typically has a
large vertical-profile, to CMOS.
Arguably the simplest and most effective method of intimately
attaching photonic devices to VLSI circuits today
is flip-chip bonding. Flip-chip bonding, currently used for
commercial silicon packaging, is a mature and well-understood
technique. The procedure involves the preparation of the
VLSI and GaAs chips with solder bumps, followed by an
alignment-and-bonding step. This is commonly done using
thermocompression bonding, although a thermosonic-bonding
approach could also be considered [27]. T



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