An image sensor as an undergraduate VLSI project chip

We have used an image sensor as a multi-year project chip for undergraduates. With this project, students experience VLSI through an entire design cycle from start to finish. Students are involved in the design, simulation, testing, i.e. all aspects of the project. The curriculum at Alfred is such that Juniors and Seniors can both take courses in VLSI emphasizing such topics as systems level design, analog design as well as other advanced topics. Students who take VLSI courses in their junior year are then allowed to work on the project chip during their senior year. Sensors constructed are based on the silicon retina, using transistors in subthreshold to produce signal compression at the pixel level. Introduction A few years ago, the Electrical Engineering Division at Alfred University altered the undergraduate EE curriculum in order to better accommodate advanced VLSI courses at the Senior level[l]. This was done to allow students the opportunity of experience in a wider range of analog, digital systems level, and mixed mode VLSI design. This includes an advanced course in VLSI that is taken on an independent study basis and involves design and testing of a project chip. The project chip was meant to be larger, more complicated and contain a combination of hardware, control and data flow structures, various frequencies and voltages. Digital circuits would be mixed with analog. Time to market requirements and increased complexity would place increased demands on risk of errors in the design process. In this paper, we present the results of our venture in altering the course structure at Alfred, as well as the project chip which is being constructed following the initial two year development of our program. Furthermore, the entire course structure is based on a personal computer network maintained by the instructor. No further technical expertise is necessary. 0-7695-1156-2/01 $10.00 0 2001 IEEE Development Plan The basis of the plan as it now exists is shown in Fig 1. Juniors enrolled in device physics are allowed to take the first VLSI design course, EED 486, which maintains some of the basic VLSI course material first introduced from the book by Meade and Conway[2], but also adds a more systems level design approach to VLSI. Topics such as MOSFET device physics, physical layout, circuit design and SPICE simulation are left to the analog course, which is taught the next semester. Instead, an introduction to the methods of VSLI design techniques such as standard Cell ASIC and FPGA technologies are included along with an introduction to Verilog HDL. A laboratory for the course includes four projects which are designed and simulated in Verilog and implemented in FPGAs. Standard Cells designed from this course are no longer sent to MOSIS, as as was done previously. Instead, students are urged to test designs implemented in the FPGAs. The final project is the infamous roulette game, which is also implemented. A successful simulation and test results in an automatic "A" for the project Details of VLSI physical layout, including Device physics, fabrication, and SPICE extraction and simulation, are covered in the Analog VLSI course. By that time students have already had device physics. The Analog VLSI course is of similar structure to an Analog course described in Ref. [3]. Textbook for the course is currently Johns and Martin.[4] Again the PC-based layout tools are used. A student edition of the layout editor and SPICE simulator is used.

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